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author | dh73 <dh73_fpga@qq.com> | 2017-11-08 20:23:55 -0600 |
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committer | dh73 <dh73_fpga@qq.com> | 2017-11-08 20:23:55 -0600 |
commit | 1fc061d90c45166f87d92f76b6fae1ec517be72f (patch) | |
tree | b7c0418b904bfe2e730d6a29cadabdcfcf416496 /techlibs/achronix/speedster22i | |
parent | adf17547290b403e863ed7c71960a5678c6bbfaf (diff) | |
download | yosys-1fc061d90c45166f87d92f76b6fae1ec517be72f.tar.gz yosys-1fc061d90c45166f87d92f76b6fae1ec517be72f.tar.bz2 yosys-1fc061d90c45166f87d92f76b6fae1ec517be72f.zip |
Organizing Speedster file names
Diffstat (limited to 'techlibs/achronix/speedster22i')
-rwxr-xr-x | techlibs/achronix/speedster22i/cells_arith.v (renamed from techlibs/achronix/speedster22i/cells_arith_speedster.v) | 0 | ||||
-rwxr-xr-x | techlibs/achronix/speedster22i/cells_map.v (renamed from techlibs/achronix/speedster22i/cells_map_speedster.v) | 0 | ||||
-rwxr-xr-x | techlibs/achronix/speedster22i/cells_sim.v (renamed from techlibs/achronix/speedster22i/cells_comb_speedster.v) | 0 |
3 files changed, 0 insertions, 0 deletions
diff --git a/techlibs/achronix/speedster22i/cells_arith_speedster.v b/techlibs/achronix/speedster22i/cells_arith.v index 9ef073f7c..9ef073f7c 100755 --- a/techlibs/achronix/speedster22i/cells_arith_speedster.v +++ b/techlibs/achronix/speedster22i/cells_arith.v diff --git a/techlibs/achronix/speedster22i/cells_map_speedster.v b/techlibs/achronix/speedster22i/cells_map.v index fb26eabf0..fb26eabf0 100755 --- a/techlibs/achronix/speedster22i/cells_map_speedster.v +++ b/techlibs/achronix/speedster22i/cells_map.v diff --git a/techlibs/achronix/speedster22i/cells_comb_speedster.v b/techlibs/achronix/speedster22i/cells_sim.v index 24c57c41a..24c57c41a 100755 --- a/techlibs/achronix/speedster22i/cells_comb_speedster.v +++ b/techlibs/achronix/speedster22i/cells_sim.v |