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| author | Clifford Wolf <clifford@clifford.at> | 2016-05-05 18:18:48 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-05-05 18:18:48 +0200 |
| commit | ec1938737bcfb625d4e62afaefd30d67acb588bf (patch) | |
| tree | c6da1bec0741f5487ce54e36cd6bcdb08d6b56f9 /passes | |
| parent | 9647dc3c07039c49b9bcf5932050467ca451ceef (diff) | |
| parent | 2096a05ec2aaecb89316c5a229b497c21c2327f9 (diff) | |
| download | yosys-ec1938737bcfb625d4e62afaefd30d67acb588bf.tar.gz yosys-ec1938737bcfb625d4e62afaefd30d67acb588bf.tar.bz2 yosys-ec1938737bcfb625d4e62afaefd30d67acb588bf.zip | |
Merge pull request #159 from azonenberg/master
Fixes to use new I/O pad techmapping, renamed ports for GP_SHREG
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/techmap/shregmap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc index 7a8495b79..766c1c65f 100644 --- a/passes/techmap/shregmap.cc +++ b/passes/techmap/shregmap.cc @@ -82,7 +82,7 @@ struct ShregmapTechGreenpak4 : ShregmapTech int i = 0; for (auto tap : taps) { newcell->setPort(i ? "\\OUTB" : "\\OUTA", tap.second); - newcell->setParam(i ? "\\OUTB_DELAY" : "\\OUTA_DELAY", tap.first + 1); + newcell->setParam(i ? "\\OUTB_TAP" : "\\OUTA_TAP", tap.first + 1); i++; } |