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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-03-30 20:30:03 -0700 |
|---|---|---|
| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-03-30 20:30:03 -0700 |
| commit | dd7204c0bdb65956fdf27925da3ccfe6f592d012 (patch) | |
| tree | 045c49f33d135b21aa2d954dcf2be2eb0e3b1e95 /passes | |
| parent | 489caf32c54ee250338eca72c5f0098106d17788 (diff) | |
| download | yosys-dd7204c0bdb65956fdf27925da3ccfe6f592d012.tar.gz yosys-dd7204c0bdb65956fdf27925da3ccfe6f592d012.tar.bz2 yosys-dd7204c0bdb65956fdf27925da3ccfe6f592d012.zip | |
Fixed typo in log message
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/opt/opt_muxtree.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/opt_muxtree.cc b/passes/opt/opt_muxtree.cc index 905a01627..f9da807d2 100644 --- a/passes/opt/opt_muxtree.cc +++ b/passes/opt/opt_muxtree.cc @@ -68,7 +68,7 @@ struct OptMuxtreeWorker OptMuxtreeWorker(RTLIL::Design *design, RTLIL::Module *module) : design(design), module(module), assign_map(module), removed_count(0) { - log("Running muxtree optimizier on module %s..\n", module->name.c_str()); + log("Running muxtree optimizer on module %s..\n", module->name.c_str()); log(" Creating internal representation of mux trees.\n"); |