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| author | Clifford Wolf <clifford@clifford.at> | 2015-01-06 16:08:04 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-01-06 16:08:04 +0100 |
| commit | da7205010771f4dd0db6ffa9ff4e373a2a03588d (patch) | |
| tree | 0a1a963bdfae3a69c01cecba251104ca4f39b9e8 /passes | |
| parent | 859e3e41e7c96e2442d5ff2d3fb54dc5bdffea94 (diff) | |
| download | yosys-da7205010771f4dd0db6ffa9ff4e373a2a03588d.tar.gz yosys-da7205010771f4dd0db6ffa9ff4e373a2a03588d.tar.bz2 yosys-da7205010771f4dd0db6ffa9ff4e373a2a03588d.zip | |
removed old debug code
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/memory/memory_bram.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index c2e320658..8c7338b91 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -436,7 +436,6 @@ bool replace_cell(Cell *cell, const rules_t::bram_t &bram, const rules_t::match_ sig_en.append(last_en_bit); } if (last_en_bit != wr_en[i + cell_port_i*mem_width]) { - log_dump(last_en_bit, wr_en[i + cell_port_i*mem_width]); log(" Bram port %c%d has incompatible enable structure.\n", pi.group + 'A', pi.index + 1); goto skip_bram_wport; } |