diff options
| author | whitequark <whitequark@whitequark.org> | 2018-12-22 08:58:37 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-22 09:04:46 +0000 |
| commit | b784440857d6b71f46ae8784cc3767962e4edcaa (patch) | |
| tree | 6d79f3220bdc5ddb9e2351d27a8a76e7c694ec54 /passes | |
| parent | ee8a7589e09efeb38cbc5ee6fd241758d6637fe2 (diff) | |
| download | yosys-b784440857d6b71f46ae8784cc3767962e4edcaa.tar.gz yosys-b784440857d6b71f46ae8784cc3767962e4edcaa.tar.bz2 yosys-b784440857d6b71f46ae8784cc3767962e4edcaa.zip | |
proc_clean: remove any empty cases at the end of the switch.
Previously, only completely empty switches were removed.
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/proc/proc_clean.cc | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/passes/proc/proc_clean.cc b/passes/proc/proc_clean.cc index b9e43d1db..477d1ac60 100644 --- a/passes/proc/proc_clean.cc +++ b/passes/proc/proc_clean.cc @@ -77,18 +77,14 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did } else { - bool all_cases_are_empty = true; for (auto cs : sw->cases) { - if (cs->actions.size() != 0 || cs->switches.size() != 0) - all_cases_are_empty = false; if (max_depth != 0) proc_clean_case(cs, did_something, count, max_depth-1); } - if (all_cases_are_empty) { + while (!sw->cases.empty() && (sw->cases.back()->actions.empty() && sw->cases.back()->switches.empty())) { did_something = true; - for (auto cs : sw->cases) - delete cs; - sw->cases.clear(); + delete sw->cases.back(); + sw->cases.pop_back(); } } } |