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author | Eddie Hung <eddie@fpgeh.com> | 2019-11-28 12:58:30 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-28 12:58:30 -0800 |
commit | a26c52394f193a3f912e0fdbb688c78110a0c974 (patch) | |
tree | 7f7bcf7e13144f920498be9be172e3852d8d8d2a /passes | |
parent | c61186dd9d802c2e62fb218527b3328ac1754d9d (diff) | |
parent | b3a66dff7cac8ee98a9b26463e8858a38ea57f83 (diff) | |
download | yosys-a26c52394f193a3f912e0fdbb688c78110a0c974.tar.gz yosys-a26c52394f193a3f912e0fdbb688c78110a0c974.tar.bz2 yosys-a26c52394f193a3f912e0fdbb688c78110a0c974.zip |
Merge remote-tracking branch 'origin/eddie/submod_po' into xaig_dff
Diffstat (limited to 'passes')
-rw-r--r-- | passes/hierarchy/submod.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc index 839f8561c..211f96175 100644 --- a/passes/hierarchy/submod.cc +++ b/passes/hierarchy/submod.cc @@ -175,7 +175,7 @@ struct SubmodWorker new_wire->port_output = new_wire_port_output; new_wire->start_offset = wire->start_offset; new_wire->attributes = wire->attributes; - if (new_wire->port_output) { + if (!flags.is_int_driven.is_fully_zero()) { new_wire->attributes.erase(ID(init)); auto sig = sigmap(wire); for (int i = 0; i < GetSize(sig); i++) { |