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| author | Clifford Wolf <clifford@clifford.at> | 2014-02-27 04:09:32 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-02-27 04:09:32 +0100 |
| commit | 9e9998433616f438cb0185519bb5b7f8e1a8f543 (patch) | |
| tree | afd8018402a4ed312860b0e15a6bcb870bb49e5a /passes | |
| parent | ae5032af845b4c85510b3ce4a63fea3cca5e6a00 (diff) | |
| download | yosys-9e9998433616f438cb0185519bb5b7f8e1a8f543.tar.gz yosys-9e9998433616f438cb0185519bb5b7f8e1a8f543.tar.bz2 yosys-9e9998433616f438cb0185519bb5b7f8e1a8f543.zip | |
Fixed const folding of $bu0 cells
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/opt/opt_const.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/opt/opt_const.cc b/passes/opt/opt_const.cc index ad9a71b15..da71ec30e 100644 --- a/passes/opt/opt_const.cc +++ b/passes/opt/opt_const.cc @@ -463,6 +463,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons FOLD_2ARG_CELL(pow) FOLD_1ARG_CELL(pos) + FOLD_1ARG_CELL(bu0) FOLD_1ARG_CELL(neg) // be very conservative with optimizing $mux cells as we do not want to break mux trees |