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| author | Clifford Wolf <clifford@clifford.at> | 2017-12-13 19:14:34 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2017-12-13 19:14:34 +0100 |
| commit | 88182e46d7897625f2889bf1e681b7e0e4f7b966 (patch) | |
| tree | b3fb5243433e35d5ed1c9bbbb78cc6fac7417921 /passes | |
| parent | 07bfe8ba4099d0d9e040923447583446449d73b1 (diff) | |
| download | yosys-88182e46d7897625f2889bf1e681b7e0e4f7b966.tar.gz yosys-88182e46d7897625f2889bf1e681b7e0e4f7b966.tar.bz2 yosys-88182e46d7897625f2889bf1e681b7e0e4f7b966.zip | |
Check for memories in clk2fflogic
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/sat/clk2fflogic.cc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/passes/sat/clk2fflogic.cc b/passes/sat/clk2fflogic.cc index ef6d5dd72..fbd71fe58 100644 --- a/passes/sat/clk2fflogic.cc +++ b/passes/sat/clk2fflogic.cc @@ -72,6 +72,11 @@ struct Clk2fflogicPass : public Pass { for (auto cell : vector<Cell*>(module->selected_cells())) { + if (cell->type.in("$mem")) + { + log_error("Currently there is no support for memories in clk2fflogic. Run memory_map first to convert memories to logic.\n"); + } + if (cell->type.in("$dlatch")) { bool enpol = cell->parameters["\\EN_POLARITY"].as_bool(); |