Merge remote-tracking branch 'origin/eddie/wreduce_add' into ice40dsp

1 files changed, 26 insertions, 3 deletions

diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc
index 1fbc41082..dff1c5370 100644
--- a/passes/opt/wreduce.cc
+++ b/passes/opt/wreduce.cc
@@ -342,9 +342,9 @@ struct WreduceWorker
 			}
 		}
 
-		if (cell->type.in("$pos", "$add", "$mul", "$and", "$or", "$xor"))
+		if (cell->type.in("$pos", "$add", "$mul", "$and", "$or", "$xor", "$sub"))
 		{
-			bool is_signed = cell->getParam("\\A_SIGNED").as_bool();
+			bool is_signed = cell->getParam("\\A_SIGNED").as_bool() || cell->type == "$sub";
 
 			int a_size = 0, b_size = 0;
 			if (cell->hasPort("\\A")) a_size = GetSize(cell->getPort("\\A"));
@@ -352,7 +352,7 @@ struct WreduceWorker
 
 			int max_y_size = max(a_size, b_size);
 
-			if (cell->type == "$add")
+			if (cell->type.in("$add", "$sub"))
 				max_y_size++;
 
 			if (cell->type == "$mul")
@@ -365,6 +365,29 @@ struct WreduceWorker
 			}
 		}
 
+		if (cell->type.in("$add", "$sub")) {
+			SigSpec A = cell->getPort("\\A");
+			SigSpec B = cell->getPort("\\B");
+			bool sub = cell->type == "$sub";
+
+			int i;
+			for (i = 0; i < GetSize(sig); i++) {
+				if (B[i] != S0 && (sub || A[i] != S0))
+					break;
+				if (B[i] == S0)
+					module->connect(sig[i], A[i]);
+				else if (A[i] == S0)
+					module->connect(sig[i], B[i]);
+				else log_abort();
+			}
+			if (i > 0) {
+				cell->setPort("\\A", A.extract(i, -1));
+				cell->setPort("\\B", B.extract(i, -1));
+				sig.remove(0, i);
+				bits_removed += i;
+			}
+		}
+
 		if (GetSize(sig) == 0) {
 			log("Removed cell %s.%s (%s).\n", log_id(module), log_id(cell), log_id(cell->type));
 			module->remove(cell);