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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-23 12:58:30 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-23 12:58:30 -0700 |
| commit | 5ac7e38d0aab1c73150accd9befbccc5398b8e42 (patch) | |
| tree | b10e81cc194fe0e25253f7a40408c920a41b2993 /passes | |
| parent | 47f9ea142fcca94577519ede3de44b7c8b4f4379 (diff) | |
| download | yosys-5ac7e38d0aab1c73150accd9befbccc5398b8e42.tar.gz yosys-5ac7e38d0aab1c73150accd9befbccc5398b8e42.tar.bz2 yosys-5ac7e38d0aab1c73150accd9befbccc5398b8e42.zip | |
Fix spacing
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/opt/opt_rmdff.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/opt/opt_rmdff.cc b/passes/opt/opt_rmdff.cc index a4ed582cb..3cb8e2b1e 100644 --- a/passes/opt/opt_rmdff.cc +++ b/passes/opt/opt_rmdff.cc @@ -342,8 +342,8 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) if (!sig_e.is_fully_const()) return false; if (sig_e != val_ep) { - if (has_init) - mod->connect(sig_q, val_init); + if (has_init) + mod->connect(sig_q, val_init); goto delete_dff; } } |