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| author | Eddie Hung <eddie@fpgeh.com> | 2020-05-25 09:14:00 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-25 09:14:00 -0700 |
| commit | 59b355fb85cb7cda4a25696850bb3caffce3115f (patch) | |
| tree | 29bb187608d8810118d959d3aed162aa24778b41 /passes | |
| parent | ae11156c90eec958cd9ab631a28c41eccc105e56 (diff) | |
| parent | c5a9abba11a2e69a5e9944c179f7dba3d24f417a (diff) | |
| download | yosys-59b355fb85cb7cda4a25696850bb3caffce3115f.tar.gz yosys-59b355fb85cb7cda4a25696850bb3caffce3115f.tar.bz2 yosys-59b355fb85cb7cda4a25696850bb3caffce3115f.zip | |
Merge pull request #2044 from YosysHQ/eddie/fix2037
verilog: allow attributes on behavioural statements (including null statement)
Diffstat (limited to 'passes')
0 files changed, 0 insertions, 0 deletions