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author | whitequark <whitequark@whitequark.org> | 2019-01-23 22:08:38 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2019-01-23 22:08:38 +0000 |
commit | 58d059ccb7f32f4d061fe3d7caf57483fbf01516 (patch) | |
tree | a13b48f04315dea1af6903b9612ba666353640ef /passes | |
parent | c4b61f2d69e88ddefd8ceec02ccf074c1b713004 (diff) | |
download | yosys-58d059ccb7f32f4d061fe3d7caf57483fbf01516.tar.gz yosys-58d059ccb7f32f4d061fe3d7caf57483fbf01516.tar.bz2 yosys-58d059ccb7f32f4d061fe3d7caf57483fbf01516.zip |
proc_clean: fix critical typo.
Diffstat (limited to 'passes')
-rw-r--r-- | passes/proc/proc_clean.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/proc/proc_clean.cc b/passes/proc/proc_clean.cc index 0e2f95226..52141a8ec 100644 --- a/passes/proc/proc_clean.cc +++ b/passes/proc/proc_clean.cc @@ -86,7 +86,7 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did for (auto cmp : cs->compare) { size += cmp.size(); - if (cmp.is_fully_def()) + if (!cmp.is_fully_def()) all_fully_def = false; } if (sw->signal.size() != size) |