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| author | Clifford Wolf <clifford@clifford.at> | 2017-07-21 16:21:04 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2017-07-21 16:21:12 +0200 |
| commit | 36cf18ac4c1f96cad795032c3597abf08af6a6d8 (patch) | |
| tree | 4f3079d9527e52509bf23c035485277859afe9d9 /passes | |
| parent | 26766da34392aa4dc773c4e0ec36e7a7e59dad3e (diff) | |
| download | yosys-36cf18ac4c1f96cad795032c3597abf08af6a6d8.tar.gz yosys-36cf18ac4c1f96cad795032c3597abf08af6a6d8.tar.bz2 yosys-36cf18ac4c1f96cad795032c3597abf08af6a6d8.zip | |
Fix "read_blif -wideports" handling of cells with wide ports
Diffstat (limited to 'passes')
0 files changed, 0 insertions, 0 deletions