diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-02-16 21:58:27 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-02-16 21:58:27 +0100 |
| commit | 28e14ee50a3effcd5335ec06f5b1c2acda008a4e (patch) | |
| tree | bbf1903d6c0a53918955210e5b508f39e10c3570 /passes | |
| parent | 7d7e068dd1c5e04cf0c2b9e18abade2b49fe677e (diff) | |
| download | yosys-28e14ee50a3effcd5335ec06f5b1c2acda008a4e.tar.gz yosys-28e14ee50a3effcd5335ec06f5b1c2acda008a4e.tar.bz2 yosys-28e14ee50a3effcd5335ec06f5b1c2acda008a4e.zip | |
Fixed handling of "keep" attribute on wires in opt_clean
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/opt/opt_clean.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc index 733a1cbf1..d330fb7bd 100644 --- a/passes/opt/opt_clean.cc +++ b/passes/opt/opt_clean.cc @@ -227,10 +227,10 @@ static void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool std::vector<RTLIL::Wire*> del_wires; for (auto &it : module->wires) { RTLIL::Wire *wire = it.second; - if ((!purge_mode && check_public_name(wire->name)) || wire->port_id != 0) { + if ((!purge_mode && check_public_name(wire->name)) || wire->port_id != 0 || wire->get_bool_attribute("\\keep")) { RTLIL::SigSpec s1 = RTLIL::SigSpec(wire), s2 = s1; assign_map.apply(s2); - if (!used_signals.check_any(s2) && wire->port_id == 0) { + if (!used_signals.check_any(s2) && wire->port_id == 0 && !wire->get_bool_attribute("\\keep")) { del_wires.push_back(wire); } else { s1.expand(); |