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author | Clifford Wolf <clifford@clifford.at> | 2019-06-20 12:23:07 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-06-20 12:23:07 +0200 |
commit | 11ec7b2aecddc72747ccdc30d2674583062d58d3 (patch) | |
tree | f866b0d98aca0ebbdc95ed2b9ffc85b9b1e6600c /passes | |
parent | 7f1461d64b3b4db44b627429ca422acfbcbb6809 (diff) | |
download | yosys-11ec7b2aecddc72747ccdc30d2674583062d58d3.tar.gz yosys-11ec7b2aecddc72747ccdc30d2674583062d58d3.tar.bz2 yosys-11ec7b2aecddc72747ccdc30d2674583062d58d3.zip |
Fix typo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'passes')
-rw-r--r-- | passes/cmds/stat.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/cmds/stat.cc b/passes/cmds/stat.cc index d22685b62..27c5fb60c 100644 --- a/passes/cmds/stat.cc +++ b/passes/cmds/stat.cc @@ -285,8 +285,8 @@ struct StatPass : public Pass { log(" use cell area information from the provided liberty file\n"); log("\n"); log(" -tech <technology>\n"); - log(" print area estemate for the specified technology. Corrently supported\n"); - log(" calues for <technology>: xilinx\n"); + log(" print area estemate for the specified technology. Currently supported\n"); + log(" values for <technology>: xilinx\n"); log("\n"); log(" -width\n"); log(" annotate internal cell types with their word width.\n"); |