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author | Miodrag Milanović <mmicko@gmail.com> | 2019-09-30 17:49:23 +0200 |
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committer | GitHub <noreply@github.com> | 2019-09-30 17:49:23 +0200 |
commit | 0d27ffd4e6d53349d80d6f29f9e6b2f1c4b03cb7 (patch) | |
tree | bd4c25fab759a4dc4a7354a9f6fc72205e97dfda /passes | |
parent | 7ed13297b104c200f6d15cf1265417e823c8d308 (diff) | |
parent | 9e55b234b47b01dc396e793b7f31236c9e87c185 (diff) | |
download | yosys-0d27ffd4e6d53349d80d6f29f9e6b2f1c4b03cb7.tar.gz yosys-0d27ffd4e6d53349d80d6f29f9e6b2f1c4b03cb7.tar.bz2 yosys-0d27ffd4e6d53349d80d6f29f9e6b2f1c4b03cb7.zip |
Merge pull request #1416 from YosysHQ/mmicko/frontend_binary_in
Open aig frontend as binary file
Diffstat (limited to 'passes')
-rw-r--r-- | passes/techmap/abc9.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index aa473e67d..09d6e9670 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -471,7 +471,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri log_error("ABC: execution of command \"%s\" failed: return code %d.\n", buffer.c_str(), ret); buffer = stringf("%s/%s", tempdir_name.c_str(), "output.aig"); - ifs.open(buffer); + ifs.open(buffer, std::ifstream::binary); if (ifs.fail()) log_error("Can't open ABC output file `%s'.\n", buffer.c_str()); |