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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-18 09:55:03 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-18 09:55:03 -0700 |
| commit | 070a2d2fd6b2d79a71be1ab5b8fe40e40e690433 (patch) | |
| tree | 0dc777dd31d2e7c3f3be8d767a9492f6e8090ae5 /passes | |
| parent | 9aa94370a54c016421740d2ce32ef0aa338d0dbd (diff) | |
| download | yosys-070a2d2fd6b2d79a71be1ab5b8fe40e40e690433.tar.gz yosys-070a2d2fd6b2d79a71be1ab5b8fe40e40e690433.tar.bz2 yosys-070a2d2fd6b2d79a71be1ab5b8fe40e40e690433.zip | |
Fix abc's remap_name to not ignore [^0-9] when extracting sid
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/techmap/abc.cc | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index aaf580eff..547115459 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -331,19 +331,23 @@ std::string remap_name(RTLIL::IdString abc_name, RTLIL::Wire **orig_wire = nullp { std::string abc_sname = abc_name.substr(1); if (abc_sname.substr(0, 5) == "ys__n") { - int sid = std::stoi(abc_sname.substr(5)); bool inv = abc_sname.back() == 'v'; - for (auto sig : signal_list) { - if (sig.id == sid && sig.bit.wire != nullptr) { - std::stringstream sstr; - sstr << "$abc$" << map_autoidx << "$" << sig.bit.wire->name.substr(1); - if (sig.bit.wire->width != 1) - sstr << "[" << sig.bit.offset << "]"; - if (inv) - sstr << "_inv"; - if (orig_wire != nullptr) - *orig_wire = sig.bit.wire; - return sstr.str(); + if (inv) abc_sname.pop_back(); + abc_sname.erase(0, 5); + if (abc_sname.find_last_not_of("012345689") == std::string::npos) { + int sid = std::stoi(abc_sname); + for (auto sig : signal_list) { + if (sig.id == sid && sig.bit.wire != nullptr) { + std::stringstream sstr; + sstr << "$abc$" << map_autoidx << "$" << sig.bit.wire->name.substr(1); + if (sig.bit.wire->width != 1) + sstr << "[" << sig.bit.offset << "]"; + if (inv) + sstr << "_inv"; + if (orig_wire != nullptr) + *orig_wire = sig.bit.wire; + return sstr.str(); + } } } } |