diff options
author | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 19:00:36 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 19:00:36 -0700 |
commit | e612dade12b30bdee15b7dd2535af51e5ec1614d (patch) | |
tree | e38be54476c557471cc8a30bc8c140d7c2797b3a /passes/techmap | |
parent | 014606affe3f1753ac16d2afd684967d72d83746 (diff) | |
parent | 477e566e8d203ec7754c90fc845d7f3f759f2974 (diff) | |
download | yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.tar.gz yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.tar.bz2 yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.zip |
Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'passes/techmap')
-rw-r--r-- | passes/techmap/muxcover.cc | 6 | ||||
-rw-r--r-- | passes/techmap/shregmap.cc | 2 |
2 files changed, 5 insertions, 3 deletions
diff --git a/passes/techmap/muxcover.cc b/passes/techmap/muxcover.cc index 32102436d..8e44be148 100644 --- a/passes/techmap/muxcover.cc +++ b/passes/techmap/muxcover.cc @@ -610,7 +610,7 @@ struct MuxcoverPass : public Pass { use_mux4 = true; if (arg.size() > 5) { if (arg[5] != '=') break; - cost_mux4 = atoi(arg.substr(5).c_str()); + cost_mux4 = atoi(arg.substr(6).c_str()); } continue; } @@ -618,7 +618,7 @@ struct MuxcoverPass : public Pass { use_mux8 = true; if (arg.size() > 5) { if (arg[5] != '=') break; - cost_mux8 = atoi(arg.substr(5).c_str()); + cost_mux8 = atoi(arg.substr(6).c_str()); } continue; } @@ -626,7 +626,7 @@ struct MuxcoverPass : public Pass { use_mux16 = true; if (arg.size() > 6) { if (arg[6] != '=') break; - cost_mux16 = atoi(arg.substr(6).c_str()); + cost_mux16 = atoi(arg.substr(7).c_str()); } continue; } diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc index 21dfe9619..18e60fa6b 100644 --- a/passes/techmap/shregmap.cc +++ b/passes/techmap/shregmap.cc @@ -605,9 +605,11 @@ struct ShregmapPass : public Pass { log("\n"); log(" -tech greenpak4\n"); log(" map to greenpak4 shift registers.\n"); + log(" this option also implies -clkpol pos -zinit\n"); log("\n"); log(" -tech xilinx\n"); log(" map to xilinx dynamic-length shift registers.\n"); + log(" this option also implies -params -init\n"); log("\n"); } void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE |