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| author | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-04-21 17:47:00 +0000 |
|---|---|---|
| committer | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-05-14 20:06:55 +0000 |
| commit | e17329164904f05efa48be63fbb73ec8afdda8e4 (patch) | |
| tree | fee28fcce43bea4ab8541d9528e2599ee7b70c6d /passes/techmap | |
| parent | 97fd304cbec4b760bb2ea454668c4957ddb99624 (diff) | |
| download | yosys-e17329164904f05efa48be63fbb73ec8afdda8e4.tar.gz yosys-e17329164904f05efa48be63fbb73ec8afdda8e4.tar.bz2 yosys-e17329164904f05efa48be63fbb73ec8afdda8e4.zip | |
techmap: Replace naughty `const_cast<>()`s.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
Diffstat (limited to 'passes/techmap')
| -rw-r--r-- | passes/techmap/techmap.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index 0b88e5910..6ac1d1113 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -413,8 +413,10 @@ struct TechmapWorker if (autopurge) { autopurge_ports.push_back(conn.first); } else { - apply_prefix(cell->name, const_cast<RTLIL::SigSpec&>(conn.second), module); - port_signal_map.apply(const_cast<RTLIL::SigSpec&>(conn.second)); + RTLIL::SigSpec new_conn = conn.second; + apply_prefix(cell->name, new_conn, module); + port_signal_map.apply(new_conn); + c->setPort(conn.first, std::move(new_conn)); } } |