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| author | Clifford Wolf <clifford@clifford.at> | 2017-09-14 22:36:25 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-09-14 22:36:25 +0200 |
| commit | ce78717e3601012e95cf786b87b281e55a3a8391 (patch) | |
| tree | 22f91aab0f0b5188a67afc32e813de787b5bb3f6 /passes/techmap | |
| parent | 498526cc0beef5f3d5da88f91806eb043551a549 (diff) | |
| parent | ab1bf8d661d3edd865c1b425535b81e8fba9d58d (diff) | |
| download | yosys-ce78717e3601012e95cf786b87b281e55a3a8391.tar.gz yosys-ce78717e3601012e95cf786b87b281e55a3a8391.tar.bz2 yosys-ce78717e3601012e95cf786b87b281e55a3a8391.zip | |
Merge pull request #412 from azonenberg/reduce-fixes
extract_reduce: Fix segfault on "undriven" inputs
Diffstat (limited to 'passes/techmap')
| -rw-r--r-- | passes/techmap/extract_reduce.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/extract_reduce.cc b/passes/techmap/extract_reduce.cc index 114015c23..54e45f836 100644 --- a/passes/techmap/extract_reduce.cc +++ b/passes/techmap/extract_reduce.cc @@ -160,7 +160,7 @@ struct ExtractReducePass : public Pass if (sig_to_sink[a[0]].size() + port_sigs.count(a[0]) == 1) { Cell* cell_a = sig_to_driver[a[0]]; - if (((cell_a->type == "$_AND_" && gt == GateType::And) || + if (cell_a && ((cell_a->type == "$_AND_" && gt == GateType::And) || (cell_a->type == "$_OR_" && gt == GateType::Or) || (cell_a->type == "$_XOR_" && gt == GateType::Xor))) { @@ -177,7 +177,7 @@ struct ExtractReducePass : public Pass if (sig_to_sink[b[0]].size() + port_sigs.count(b[0]) == 1) { Cell* cell_b = sig_to_driver[b[0]]; - if (((cell_b->type == "$_AND_" && gt == GateType::And) || + if (cell_b && ((cell_b->type == "$_AND_" && gt == GateType::And) || (cell_b->type == "$_OR_" && gt == GateType::Or) || (cell_b->type == "$_XOR_" && gt == GateType::Xor))) { |