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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 17:17:47 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 17:17:47 -0800 |
| commit | ca70f9650336b4e58a13ab119e098f6494549f27 (patch) | |
| tree | 5f9eab8203ac526cc83902a0546eaa155dd541a5 /passes/techmap | |
| parent | ef3e84aac97565caff1f7d9bbce459d1592318ad (diff) | |
| download | yosys-ca70f9650336b4e58a13ab119e098f6494549f27.tar.gz yosys-ca70f9650336b4e58a13ab119e098f6494549f27.tar.bz2 yosys-ca70f9650336b4e58a13ab119e098f6494549f27.zip | |
abc9.script.* constpad entries to start with '+'
Diffstat (limited to 'passes/techmap')
| -rw-r--r-- | passes/techmap/abc9.cc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index e8988f699..7039d4dd8 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -278,8 +278,8 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip } else abc9_script += stringf("source %s", script_file.c_str()); } else if (!lut_costs.empty() || !lut_file.empty()) { - abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast") - : RTLIL::constpad.at("abc9.script.default"); + abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast").substr(1,std::string::npos) + : RTLIL::constpad.at("abc9.script.default").substr(1,std::string::npos); } else log_abort(); @@ -732,11 +732,11 @@ struct Abc9Pass : public Pass { Abc9Pass() : Pass("abc9", "use ABC9 for technology mapping") { } void on_register() YS_OVERRIDE { - RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; - RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "&if {C} {W} {D} {R}"; + RTLIL::constpad["abc9.script.default"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; + RTLIL::constpad["abc9.script.default.area"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; + RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R}"; // Based on ABC's &flow - RTLIL::constpad["abc9.script.flow"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow"] = "+&scorr; &sweep;" \ /* Round 1 */ \ "&unmap; &if {C} {W} {D} {R}; &mfs;" \ "&st; &dsdb;" \ @@ -753,7 +753,7 @@ struct Abc9Pass : public Pass { "&blut -a -K 6;" \ "&unmap; &if {C} {W} {D} {R} -v; &mfs"; // Based on ABC's &flow2 - RTLIL::constpad["abc9.script.flow2"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow2"] = "+&scorr; &sweep;" \ /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ "&load; &st; &sopb -R 10 -C 4; " \ @@ -761,7 +761,7 @@ struct Abc9Pass : public Pass { /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save; "\ "&load"; // Based on ABC's &flow3 - RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow3"] = "+&scorr; &sweep;" \ "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} {R} -v; &save; &load;"\ "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} {R} -v; &save; &load;"\ "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} {R} -v; &save; &load;"\ |