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author | Dag Lem <dag@nimrod.no> | 2022-09-20 14:30:12 +0200 |
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committer | Dag Lem <dag@nimrod.no> | 2022-09-20 14:31:19 +0200 |
commit | c4c68e8d860664d2b5c62f31f46ce1a24e222b86 (patch) | |
tree | b55f7caa19ec06de3b00f31fc04fd70c9e52dddb /passes/techmap | |
parent | a217450524e21222d8d32bd448f1ea2291685258 (diff) | |
download | yosys-c4c68e8d860664d2b5c62f31f46ce1a24e222b86.tar.gz yosys-c4c68e8d860664d2b5c62f31f46ce1a24e222b86.tar.bz2 yosys-c4c68e8d860664d2b5c62f31f46ce1a24e222b86.zip |
Fix crash in flowmap
In 2fcc1ee72e, the following is apparantly added in order to mark any
number of undefined LUT inputs:
lut_a.append(RTLIL::Const(State::Sx, minlut - input_nodes.size()));
However this can only be done if the number of input nodes is less
than minlut.
This fixes #3317
Diffstat (limited to 'passes/techmap')
-rw-r--r-- | passes/techmap/flowmap.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/passes/techmap/flowmap.cc b/passes/techmap/flowmap.cc index dfdbe6b88..579503a0b 100644 --- a/passes/techmap/flowmap.cc +++ b/passes/techmap/flowmap.cc @@ -1406,7 +1406,8 @@ struct FlowmapWorker RTLIL::SigSpec lut_a, lut_y = node; for (auto input_node : input_nodes) lut_a.append(input_node); - lut_a.append(RTLIL::Const(State::Sx, minlut - input_nodes.size())); + if ((int)input_nodes.size() < minlut) + lut_a.append(RTLIL::Const(State::Sx, minlut - input_nodes.size())); RTLIL::Cell *lut = module->addLut(NEW_ID, lut_a, lut_y, lut_table); mapped_nodes.insert(node); |