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author | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-04-19 22:34:17 +0000 |
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committer | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-05-14 20:06:54 +0000 |
commit | c43017fc082ecf860283c860e8f9de18c3ae09c3 (patch) | |
tree | c5e35c340a19eec3687bdc7c55b6145022622526 /passes/techmap | |
parent | 644e55b3d30159b3dc033e5cfbfe07bde2604ea7 (diff) | |
download | yosys-c43017fc082ecf860283c860e8f9de18c3ae09c3.tar.gz yosys-c43017fc082ecf860283c860e8f9de18c3ae09c3.tar.bz2 yosys-c43017fc082ecf860283c860e8f9de18c3ae09c3.zip |
Replace `std::map` with `dict` for `TechmapWires` type.
Diffstat (limited to 'passes/techmap')
-rw-r--r-- | passes/techmap/techmap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index 416d96862..3a68d3cb9 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -79,7 +79,7 @@ struct TechmapWorker RTLIL::SigSpec value; }; - typedef std::map<IdString, std::vector<TechmapWireData>> TechmapWires; + typedef dict<IdString, std::vector<TechmapWireData>> TechmapWires; bool extern_mode; bool assert_mode; |