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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-15 05:45:16 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-15 05:45:16 -0700 |
| commit | bf312043d47c5ca99e26e25d153b49b3d3603ea4 (patch) | |
| tree | 983b84cd12ff3195255146ead0454776a9ebd390 /passes/techmap | |
| parent | 7ff8330d1e159173f9ed3494b85b83cb97208ab5 (diff) | |
| download | yosys-bf312043d47c5ca99e26e25d153b49b3d3603ea4.tar.gz yosys-bf312043d47c5ca99e26e25d153b49b3d3603ea4.tar.bz2 yosys-bf312043d47c5ca99e26e25d153b49b3d3603ea4.zip | |
Fix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> O
Diffstat (limited to 'passes/techmap')
0 files changed, 0 insertions, 0 deletions