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author | Eddie Hung <eddie@fpgeh.com> | 2019-06-14 12:43:20 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-14 12:43:20 -0700 |
commit | 8fa74287a71fc3527cf48c7fb2c4a635ee832b72 (patch) | |
tree | ac78e40defe12c75bcc040f973217ad6875bf5af /passes/techmap | |
parent | 7876b5b8bef1ff8460e48232e68bb5136f04e7b5 (diff) | |
download | yosys-8fa74287a71fc3527cf48c7fb2c4a635ee832b72.tar.gz yosys-8fa74287a71fc3527cf48c7fb2c4a635ee832b72.tar.bz2 yosys-8fa74287a71fc3527cf48c7fb2c4a635ee832b72.zip |
As per @daveshah1 remove async DFF timing from xilinx
Diffstat (limited to 'passes/techmap')
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