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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2021-01-11 18:37:27 +0000 |
|---|---|---|
| committer | Dan Ravensloft <dan.ravensloft@gmail.com> | 2021-01-26 16:23:08 +0000 |
| commit | 74dad5afe72ff1afa777352e9ca078cd80878a52 (patch) | |
| tree | d5d43c4032819ca42a5685ad158c5a1603d5c016 /passes/techmap | |
| parent | b0004911ca15ec41db56c76c83461061fedc742e (diff) | |
| download | yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.tar.gz yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.tar.bz2 yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.zip | |
scc: Add -specify option to find loops in boxes
Diffstat (limited to 'passes/techmap')
| -rw-r--r-- | passes/techmap/abc9.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 7d017ac40..56bb15495 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -339,7 +339,7 @@ struct Abc9Pass : public ScriptPass if (check_label("pre")) { run("read_verilog -icells -lib -specify +/abc9_model.v"); - run("scc -set_attr abc9_scc_id {}"); + run("scc -specify -set_attr abc9_scc_id {}"); if (help_mode) run("abc9_ops -mark_scc -prep_delays -prep_xaiger [-dff]", "(option for -dff)"); else |