aboutsummaryrefslogtreecommitdiffstats
path: root/passes/techmap
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2019-08-15 22:44:38 +0200
committerGitHub <noreply@github.com>2019-08-15 22:44:38 +0200
commit49301b733eede41f2a4165440eee68c1a71f36e6 (patch)
tree4fe0f872f39957888d09d363041fb9b1e18c1e83 /passes/techmap
parent0c5db07cd6cc3c19b926da21a46599f97592b20f (diff)
parentd8a2aaa46379df7a07f4b776b7f9981b04999215 (diff)
downloadyosys-49301b733eede41f2a4165440eee68c1a71f36e6.tar.gz
yosys-49301b733eede41f2a4165440eee68c1a71f36e6.tar.bz2
yosys-49301b733eede41f2a4165440eee68c1a71f36e6.zip
Merge branch 'master' into clifford/fix1255
Diffstat (limited to 'passes/techmap')
-rw-r--r--passes/techmap/extract_fa.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/extract_fa.cc b/passes/techmap/extract_fa.cc
index b541ceb6b..8f195a90a 100644
--- a/passes/techmap/extract_fa.cc
+++ b/passes/techmap/extract_fa.cc
@@ -513,13 +513,13 @@ struct ExtractFaWorker
}
if (func2.at(key).count(xor2_func)) {
- SigBit YY = invert_xy ? module->NotGate(NEW_ID, Y) : Y;
+ SigBit YY = invert_xy || (f2i.inv_a && !f2i.inv_b) || (!f2i.inv_a && f2i.inv_b) ? module->NotGate(NEW_ID, Y) : Y;
for (auto bit : func2.at(key).at(xor2_func))
assign_new_driver(bit, YY);
}
if (func2.at(key).count(xnor2_func)) {
- SigBit YY = invert_xy ? Y : module->NotGate(NEW_ID, Y);
+ SigBit YY = invert_xy || (f2i.inv_a && !f2i.inv_b) || (!f2i.inv_a && f2i.inv_b) ? Y : module->NotGate(NEW_ID, Y);
for (auto bit : func2.at(key).at(xnor2_func))
assign_new_driver(bit, YY);
}