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| author | clairexen <claire@symbioticeda.com> | 2020-06-02 17:12:02 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-06-02 17:12:02 +0200 |
| commit | 2ed045738b1876f6439afd7f44c73100d7c96e99 (patch) | |
| tree | 918943843549fca65476e602fe4a0ec43727248d /passes/techmap | |
| parent | ff785cdb46d6b1ddc19d5acc21b4d1236b3adf3f (diff) | |
| parent | 71072d1945b76107a4adc84f6666d100beca6ced (diff) | |
| download | yosys-2ed045738b1876f6439afd7f44c73100d7c96e99.tar.gz yosys-2ed045738b1876f6439afd7f44c73100d7c96e99.tar.bz2 yosys-2ed045738b1876f6439afd7f44c73100d7c96e99.zip | |
Merge pull request #2101 from YosysHQ/mmicko/verific_asymmetric
Support asymmetric memories for verific frontend
Diffstat (limited to 'passes/techmap')
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