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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-21 14:24:50 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-21 14:24:50 -0700 |
| commit | a3371e118b05eb9bd5dddb1c20758674ae50a803 (patch) | |
| tree | 2293da584bc545d2b04948e2f5e28aad2d8b0cea /passes/techmap/simplemap.cc | |
| parent | e3f20b17afce26f08b277b757e32c33a473a8571 (diff) | |
| parent | f84a84e3f1a27b361c21fcd30fcf50c1a6586629 (diff) | |
| download | yosys-a3371e118b05eb9bd5dddb1c20758674ae50a803.tar.gz yosys-a3371e118b05eb9bd5dddb1c20758674ae50a803.tar.bz2 yosys-a3371e118b05eb9bd5dddb1c20758674ae50a803.zip | |
Merge branch 'master' into map_cells_before_map_luts
Diffstat (limited to 'passes/techmap/simplemap.cc')
| -rw-r--r-- | passes/techmap/simplemap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/simplemap.cc b/passes/techmap/simplemap.cc index 660b60601..f3da80c66 100644 --- a/passes/techmap/simplemap.cc +++ b/passes/techmap/simplemap.cc @@ -599,7 +599,7 @@ struct SimplemapPass : public Pass { simplemap_get_mappers(mappers); for (auto mod : design->modules()) { - if (!design->selected(mod)) + if (!design->selected(mod) || mod->get_blackbox_attribute()) continue; std::vector<RTLIL::Cell*> cells = mod->cells(); for (auto cell : cells) { |