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| author | Clifford Wolf <clifford@clifford.at> | 2019-08-17 15:01:31 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-17 15:01:31 +0200 |
| commit | 8915f496d97a2e858cbadb265695dd1a54b80ac4 (patch) | |
| tree | 352bd2245f166e0f6679fed971655c7d3df0a7b4 /passes/techmap/muxcover.cc | |
| parent | 41191f1ea48437423b4caf81e6af1e3024bb8c7d (diff) | |
| parent | 3b19c3657cda6d972bd3b1c3eeacdfca5fb35de8 (diff) | |
| download | yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.tar.gz yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.tar.bz2 yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.zip | |
Merge pull request #1300 from YosysHQ/eddie/cleanup2
Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
Diffstat (limited to 'passes/techmap/muxcover.cc')
| -rw-r--r-- | passes/techmap/muxcover.cc | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/passes/techmap/muxcover.cc b/passes/techmap/muxcover.cc index 64d5b4f7b..5541b6122 100644 --- a/passes/techmap/muxcover.cc +++ b/passes/techmap/muxcover.cc @@ -122,7 +122,7 @@ struct MuxcoverWorker } } if (cell->type == ID($_MUX_)) - sig_to_mux[sigmap(cell->getPort(ID(Y)))] = cell; + sig_to_mux[sigmap(cell->getPort(ID::Y))] = cell; } log(" Treeifying %d MUXes:\n", GetSize(sig_to_mux)); @@ -141,8 +141,8 @@ struct MuxcoverWorker if (sig_to_mux.count(bit) && (bit == rootsig || !roots.count(bit))) { Cell *c = sig_to_mux.at(bit); tree.muxes[bit] = c; - wavefront.insert(sigmap(c->getPort(ID(A)))); - wavefront.insert(sigmap(c->getPort(ID(B)))); + wavefront.insert(sigmap(c->getPort(ID::A))); + wavefront.insert(sigmap(c->getPort(ID::B))); } } @@ -517,31 +517,31 @@ struct MuxcoverWorker if (GetSize(mux.inputs) == 2) { count_muxes_by_type[0]++; Cell *cell = module->addCell(NEW_ID, ID($_MUX_)); - cell->setPort(ID(A), mux.inputs[0]); - cell->setPort(ID(B), mux.inputs[1]); + cell->setPort(ID::A, mux.inputs[0]); + cell->setPort(ID::B, mux.inputs[1]); cell->setPort(ID(S), mux.selects[0]); - cell->setPort(ID(Y), bit); + cell->setPort(ID::Y, bit); return; } if (GetSize(mux.inputs) == 4) { count_muxes_by_type[1]++; Cell *cell = module->addCell(NEW_ID, ID($_MUX4_)); - cell->setPort(ID(A), mux.inputs[0]); - cell->setPort(ID(B), mux.inputs[1]); + cell->setPort(ID::A, mux.inputs[0]); + cell->setPort(ID::B, mux.inputs[1]); cell->setPort(ID(C), mux.inputs[2]); cell->setPort(ID(D), mux.inputs[3]); cell->setPort(ID(S), mux.selects[0]); cell->setPort(ID(T), mux.selects[1]); - cell->setPort(ID(Y), bit); + cell->setPort(ID::Y, bit); return; } if (GetSize(mux.inputs) == 8) { count_muxes_by_type[2]++; Cell *cell = module->addCell(NEW_ID, ID($_MUX8_)); - cell->setPort(ID(A), mux.inputs[0]); - cell->setPort(ID(B), mux.inputs[1]); + cell->setPort(ID::A, mux.inputs[0]); + cell->setPort(ID::B, mux.inputs[1]); cell->setPort(ID(C), mux.inputs[2]); cell->setPort(ID(D), mux.inputs[3]); cell->setPort(ID(E), mux.inputs[4]); @@ -551,15 +551,15 @@ struct MuxcoverWorker cell->setPort(ID(S), mux.selects[0]); cell->setPort(ID(T), mux.selects[1]); cell->setPort(ID(U), mux.selects[2]); - cell->setPort(ID(Y), bit); + cell->setPort(ID::Y, bit); return; } if (GetSize(mux.inputs) == 16) { count_muxes_by_type[3]++; Cell *cell = module->addCell(NEW_ID, ID($_MUX16_)); - cell->setPort(ID(A), mux.inputs[0]); - cell->setPort(ID(B), mux.inputs[1]); + cell->setPort(ID::A, mux.inputs[0]); + cell->setPort(ID::B, mux.inputs[1]); cell->setPort(ID(C), mux.inputs[2]); cell->setPort(ID(D), mux.inputs[3]); cell->setPort(ID(E), mux.inputs[4]); @@ -578,7 +578,7 @@ struct MuxcoverWorker cell->setPort(ID(T), mux.selects[1]); cell->setPort(ID(U), mux.selects[2]); cell->setPort(ID(V), mux.selects[3]); - cell->setPort(ID(Y), bit); + cell->setPort(ID::Y, bit); return; } |