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| author | whitequark <whitequark@whitequark.org> | 2018-12-05 19:27:48 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-05 19:27:48 +0000 |
| commit | d1f2cb01dcde4bd8972e28df9e600a4060b77344 (patch) | |
| tree | 0eb621463baae474130efe8fb61194f5026f42ee /passes/techmap/lut2mux.cc | |
| parent | 88217d0157a1dd11a8151542adaed5d0a1c90149 (diff) | |
| download | yosys-d1f2cb01dcde4bd8972e28df9e600a4060b77344.tar.gz yosys-d1f2cb01dcde4bd8972e28df9e600a4060b77344.tar.bz2 yosys-d1f2cb01dcde4bd8972e28df9e600a4060b77344.zip | |
lut2mux: handle 1-bit INIT constant in $lut cells.
This pass already handles INIT constants shorter than 2^width, but
that was not done for the recursion base case.
Diffstat (limited to 'passes/techmap/lut2mux.cc')
| -rw-r--r-- | passes/techmap/lut2mux.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/lut2mux.cc b/passes/techmap/lut2mux.cc index d32bbff14..a4ed79550 100644 --- a/passes/techmap/lut2mux.cc +++ b/passes/techmap/lut2mux.cc @@ -32,7 +32,7 @@ int lut2mux(Cell *cell) if (GetSize(sig_a) == 1) { - cell->module->addMuxGate(NEW_ID, lut[0], lut[1], sig_a, sig_y); + cell->module->addMuxGate(NEW_ID, lut.extract(0)[0], lut.extract(1)[0], sig_a, sig_y); } else { |