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author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-05-21 12:47:55 -0700 |
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committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-05-21 12:47:55 -0700 |
commit | 489c555b41330ed9b1d69afdd8f44ef1e9a9be59 (patch) | |
tree | 64bdc5903bf099d59aa9ba9dacff03d8b7a9eda2 /passes/techmap/flowmap.cc | |
parent | 509f729e55458eda0ed7869ad269ec52d1956043 (diff) | |
parent | c907899422884d959632ed42c6589a0720b681e4 (diff) | |
download | yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.tar.gz yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.tar.bz2 yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.zip |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'passes/techmap/flowmap.cc')
-rw-r--r-- | passes/techmap/flowmap.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/flowmap.cc b/passes/techmap/flowmap.cc index 0b7931e48..f5892a60e 100644 --- a/passes/techmap/flowmap.cc +++ b/passes/techmap/flowmap.cc @@ -397,7 +397,6 @@ struct FlowGraph pool<RTLIL::SigBit> x, xi; NodePrime source_prime = {source, true}; - NodePrime sink_prime = {sink, false}; pool<NodePrime> visited; vector<NodePrime> worklist = {source_prime}; while (!worklist.empty()) @@ -1382,7 +1381,8 @@ struct FlowmapWorker vector<RTLIL::SigBit> input_nodes(lut_edges_bw[node].begin(), lut_edges_bw[node].end()); RTLIL::Const lut_table(State::Sx, max(1 << input_nodes.size(), 1 << minlut)); - for (unsigned i = 0; i < (1 << input_nodes.size()); i++) + unsigned const mask = 1 << input_nodes.size(); + for (unsigned i = 0; i < mask; i++) { ce.push(); for (size_t n = 0; n < input_nodes.size(); n++) |