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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
| commit | 956ecd48f71417b514c194a833a49238049e00b0 (patch) | |
| tree | 468d55265c2549c86a8e7dfaf4ec0afffbd613bb /passes/techmap/extractinv.cc | |
| parent | 2d86563bb206748d6eef498eb27f7a004f20113d (diff) | |
| download | yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.gz yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.bz2 yosys-956ecd48f71417b514c194a833a49238049e00b0.zip | |
kernel: big fat patch to use more ID::*, otherwise ID(*)
Diffstat (limited to 'passes/techmap/extractinv.cc')
| -rw-r--r-- | passes/techmap/extractinv.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/extractinv.cc b/passes/techmap/extractinv.cc index dda71f12a..269fe5c6c 100644 --- a/passes/techmap/extractinv.cc +++ b/passes/techmap/extractinv.cc @@ -90,7 +90,7 @@ struct ExtractinvPass : public Pass { auto cell_wire = cell_module->wire(port.first); if (!cell_wire) continue; - auto it = cell_wire->attributes.find("\\invertible_pin"); + auto it = cell_wire->attributes.find(ID::invertible_pin); if (it == cell_wire->attributes.end()) continue; IdString param_name = RTLIL::escape_id(it->second.decode_string()); |