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author | whitequark <whitequark@whitequark.org> | 2020-06-18 23:34:52 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2020-06-18 23:34:52 +0000 |
commit | 7191dd16f9d486fbe107b2c24d1858c8f88329b3 (patch) | |
tree | 11a32e71b94bc030afc32d3f8d4c8f3d3ada1588 /passes/techmap/dff2dffs.cc | |
parent | dfde1cf1c540d5580d7bc7d24f9f59a004202d60 (diff) | |
download | yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.tar.gz yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.tar.bz2 yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.zip |
Use C++11 final/override keywords.
Diffstat (limited to 'passes/techmap/dff2dffs.cc')
-rw-r--r-- | passes/techmap/dff2dffs.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/dff2dffs.cc b/passes/techmap/dff2dffs.cc index c155297d9..1cb923445 100644 --- a/passes/techmap/dff2dffs.cc +++ b/passes/techmap/dff2dffs.cc @@ -26,7 +26,7 @@ PRIVATE_NAMESPACE_BEGIN struct Dff2dffsPass : public Pass { Dff2dffsPass() : Pass("dff2dffs", "process sync set/reset with SR over CE priority") { } - void help() YS_OVERRIDE + void help() override { log("\n"); log(" dff2dffs [options] [selection]\n"); @@ -39,7 +39,7 @@ struct Dff2dffsPass : public Pass { log(" output wire's init attribute (if any).\n"); log("\n"); } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing dff2dffs pass (merge synchronous set/reset into FF cells).\n"); |