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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 12:20:08 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 12:20:08 -0700 |
| commit | 6d77236f3845cd8785e7bdd4da3c5ef966be6043 (patch) | |
| tree | 9a55ec79ecd07e4077dbb90634be19e168b15e48 /passes/techmap/dff2dffe.cc | |
| parent | 71eff6f0deae3ffaf75cca22768b66a2dc918b3e (diff) | |
| download | yosys-6d77236f3845cd8785e7bdd4da3c5ef966be6043.tar.gz yosys-6d77236f3845cd8785e7bdd4da3c5ef966be6043.tar.bz2 yosys-6d77236f3845cd8785e7bdd4da3c5ef966be6043.zip | |
substr() -> compare()
Diffstat (limited to 'passes/techmap/dff2dffe.cc')
| -rw-r--r-- | passes/techmap/dff2dffe.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/passes/techmap/dff2dffe.cc b/passes/techmap/dff2dffe.cc index 2dc577c73..c0bf3a665 100644 --- a/passes/techmap/dff2dffe.cc +++ b/passes/techmap/dff2dffe.cc @@ -377,7 +377,7 @@ struct Dff2dffePass : public Pass { mod->remove(cell); continue; } - if (cell->type.substr(0, 7) == "$_DFFE_") { + if (cell->type.begins_with("$_DFFE_")) { if (min_ce_use >= 0) { int ce_use = 0; for (auto cell_other : mod->selected_cells()) { @@ -390,8 +390,8 @@ struct Dff2dffePass : public Pass { continue; } - bool clk_pol = cell->type.substr(7, 1) == "P"; - bool en_pol = cell->type.substr(8, 1) == "P"; + bool clk_pol = cell->type.compare(7, 1, "P") == 0; + bool en_pol = cell->type.compare(8, 1, "P") == 0; RTLIL::SigSpec tmp = mod->addWire(NEW_ID); mod->addDff(NEW_ID, cell->getPort("\\C"), tmp, cell->getPort("\\Q"), clk_pol); if (en_pol) |