diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-12-08 14:10:52 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-12-08 14:10:52 +0100 |
| commit | 97487fee320b57356c810daaf2c6cb38e8576030 (patch) | |
| tree | 83feb54fad4bc42c1dac8db81d45d4ea73746d8f /passes/techmap/alumacc.cc | |
| parent | 7b62bbeee824f1ff6d483247f5613e597b8c854f (diff) | |
| download | yosys-97487fee320b57356c810daaf2c6cb38e8576030.tar.gz yosys-97487fee320b57356c810daaf2c6cb38e8576030.tar.bz2 yosys-97487fee320b57356c810daaf2c6cb38e8576030.zip | |
Added skeleton dff2dffe pass
Diffstat (limited to 'passes/techmap/alumacc.cc')
| -rw-r--r-- | passes/techmap/alumacc.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/techmap/alumacc.cc b/passes/techmap/alumacc.cc index 03174ea04..2e297a2c6 100644 --- a/passes/techmap/alumacc.cc +++ b/passes/techmap/alumacc.cc @@ -538,8 +538,8 @@ struct AlumaccPass : public Pass { log("\n"); log(" alumacc [selection]\n"); log("\n"); - log("This pass translates arithmetic operations $add, $mul, $lt, etc. to $alu and\n"); - log("$macc cells.\n"); + log("This pass translates arithmetic operations like $add, $mul, $lt, etc. to $alu\n"); + log("and $macc cells.\n"); log("\n"); } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) |