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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-14 11:10:48 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-14 10:33:56 -0700 |
| commit | 043ad8e76cd45bb573c804ffddb4a478cd4a99d4 (patch) | |
| tree | 880bc472779c5290933509411953739a9e59b1a8 /passes/techmap/abc9_ops.cc | |
| parent | a52f779ecae79be5ea79bd27f04837e7031f8415 (diff) | |
| download | yosys-043ad8e76cd45bb573c804ffddb4a478cd4a99d4.tar.gz yosys-043ad8e76cd45bb573c804ffddb4a478cd4a99d4.tar.bz2 yosys-043ad8e76cd45bb573c804ffddb4a478cd4a99d4.zip | |
abc9_ops: use new 'design -delete' and 'select -unset'
Diffstat (limited to 'passes/techmap/abc9_ops.cc')
| -rw-r--r-- | passes/techmap/abc9_ops.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc index c640d06f8..57f51503c 100644 --- a/passes/techmap/abc9_ops.cc +++ b/passes/techmap/abc9_ops.cc @@ -1204,7 +1204,8 @@ struct Abc9OpsPass : public Pass { log("\n"); log(" -prep_dff_hier\n"); log(" derive all cells with a type instantiating an (* abc9_flop *) module.\n"); - log(" store such modules in named selection '$abc9_flops'.\n"); + log(" store such modules in named selection '$abc9_flops'. store one cell\n"); + log(" instantiating each derived module into named selection '$abc9_cells'.\n"); log("\n"); log(" -prep_dff_map\n"); log(" within (* abc9_flop *) modules, move all $specify{2,3}/$specrule cells\n"); |