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authorClaire Xen <claire@clairexen.net>2021-01-28 19:01:29 +0100
committerGitHub <noreply@github.com>2021-01-28 19:01:29 +0100
commitd0d7a360edb08abf4dce6e37f61eea0a6e6ef045 (patch)
tree5bdc9a3a70981fe12bb84352eae633f8c50a92ff /passes/techmap/abc9.cc
parent98afe2b7589181c39281a6c58540f6756395e1d9 (diff)
parent74dad5afe72ff1afa777352e9ca078cd80878a52 (diff)
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Merge pull request #2535 from Ravenslofty/scc-specify
scc: Add -specify option to find loops in boxes
Diffstat (limited to 'passes/techmap/abc9.cc')
-rw-r--r--passes/techmap/abc9.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index 7d017ac40..56bb15495 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -339,7 +339,7 @@ struct Abc9Pass : public ScriptPass
if (check_label("pre")) {
run("read_verilog -icells -lib -specify +/abc9_model.v");
- run("scc -set_attr abc9_scc_id {}");
+ run("scc -specify -set_attr abc9_scc_id {}");
if (help_mode)
run("abc9_ops -mark_scc -prep_delays -prep_xaiger [-dff]", "(option for -dff)");
else