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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-01 02:14:19 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-01 02:14:19 -0800 |
| commit | 136842b1ef18b850b518705ff3e6df3958f28e0c (patch) | |
| tree | abcdddaf53bafd5e34e9aa278ffbe3d001b60cc4 /passes/sat/sat.cc | |
| parent | 705e520a527864dc32f1934bb4b2b94d75f8f0ec (diff) | |
| parent | a1c840ca5d6e8b580e21ae48550570aa9665741a (diff) | |
| download | yosys-136842b1ef18b850b518705ff3e6df3958f28e0c.tar.gz yosys-136842b1ef18b850b518705ff3e6df3958f28e0c.tar.bz2 yosys-136842b1ef18b850b518705ff3e6df3958f28e0c.zip | |
Merge branch 'master' into eddie/submod_po
Diffstat (limited to 'passes/sat/sat.cc')
| -rw-r--r-- | passes/sat/sat.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/passes/sat/sat.cc b/passes/sat/sat.cc index 430bba1e8..436ac1b01 100644 --- a/passes/sat/sat.cc +++ b/passes/sat/sat.cc @@ -269,7 +269,8 @@ struct SatHelper for (int i = 0; i < lhs.size(); i++) { RTLIL::SigSpec bit = lhs.extract(i, 1); if (rhs[i] == State::Sx || !satgen.initial_state.check_all(bit)) { - removed_bits.append(bit); + if (rhs[i] != State::Sx) + removed_bits.append(bit); lhs.remove(i, 1); rhs.remove(i, 1); i--; |