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author | Clifford Wolf <clifford@clifford.at> | 2019-04-30 11:25:15 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-04-30 11:25:15 +0200 |
commit | b515fd2d25851c90c9a0b08414c5ea5edeb916a0 (patch) | |
tree | 18e75d1f0b5ad39801b3cfcb72905ca048847ab7 /passes/pmgen | |
parent | 4306bebe586dc3a6a954a6630b9f0292c1b1b1dd (diff) | |
download | yosys-b515fd2d25851c90c9a0b08414c5ea5edeb916a0.tar.gz yosys-b515fd2d25851c90c9a0b08414c5ea5edeb916a0.tar.bz2 yosys-b515fd2d25851c90c9a0b08414c5ea5edeb916a0.zip |
Add peepopt_muldiv, fixes #930
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'passes/pmgen')
-rw-r--r-- | passes/pmgen/Makefile.inc | 3 | ||||
-rw-r--r-- | passes/pmgen/peepopt.cc | 1 | ||||
-rw-r--r-- | passes/pmgen/peepopt_muldiv.pmg | 36 | ||||
-rw-r--r-- | passes/pmgen/pmgen.py | 2 |
4 files changed, 41 insertions, 1 deletions
diff --git a/passes/pmgen/Makefile.inc b/passes/pmgen/Makefile.inc index a8cac7ea4..7911132db 100644 --- a/passes/pmgen/Makefile.inc +++ b/passes/pmgen/Makefile.inc @@ -16,7 +16,8 @@ passes/pmgen/peepopt.o: passes/pmgen/peepopt_pm.h EXTRA_OBJS += passes/pmgen/peepopt_pm.h .SECONDARY: passes/pmgen/peepopt_pm.h -PEEPOPT_PATTERN = passes/pmgen/peepopt_shiftmul.pmg +PEEPOPT_PATTERN = passes/pmgen/peepopt_shiftmul.pmg +PEEPOPT_PATTERN += passes/pmgen/peepopt_muldiv.pmg passes/pmgen/peepopt_pm.h: passes/pmgen/pmgen.py $(PEEPOPT_PATTERN) $(P) mkdir -p passes/pmgen && python3 $< -o $@ -p peepopt $(filter-out $<,$^) diff --git a/passes/pmgen/peepopt.cc b/passes/pmgen/peepopt.cc index 0584878c3..78eb68c7a 100644 --- a/passes/pmgen/peepopt.cc +++ b/passes/pmgen/peepopt.cc @@ -59,6 +59,7 @@ struct PeepoptPass : public Pass { did_something = false; peepopt_pm pm(module, module->selected_cells()); pm.run_shiftmul(); + pm.run_muldiv(); } } } diff --git a/passes/pmgen/peepopt_muldiv.pmg b/passes/pmgen/peepopt_muldiv.pmg new file mode 100644 index 000000000..06c275834 --- /dev/null +++ b/passes/pmgen/peepopt_muldiv.pmg @@ -0,0 +1,36 @@ +pattern muldiv + +state <SigSpec> t x y + +match mul + select mul->type == $mul + select GetSize(port(mul, \A)) + GetSize(port(mul, \B)) <= GetSize(port(mul, \Y)) +endmatch + +code t x y + t = port(mul, \Y); + x = port(mul, \A); + y = port(mul, \B); + branch; + std::swap(x, y); +endcode + +match div + select div->type.in($div) + index <SigSpec> port(div, \A) === t + index <SigSpec> port(div, \B) === x +endmatch + +code + SigSpec div_y = port(div, \Y); + SigSpec val_y = y; + + if (GetSize(div_y) != GetSize(val_y)) + val_y.extend_u0(GetSize(div_y), param(div, \A_SIGNED).as_bool()); + + did_something = true; + log("muldiv pattern in %s: mul=%s, div=%s\n", log_id(module), log_id(mul), log_id(div)); + module->connect(div_y, val_y); + autoremove(div); + reject; +endcode diff --git a/passes/pmgen/pmgen.py b/passes/pmgen/pmgen.py index 95a0a5f5d..81052afce 100644 --- a/passes/pmgen/pmgen.py +++ b/passes/pmgen/pmgen.py @@ -335,6 +335,8 @@ with open(outfile, "w") as f: print(" blacklist_dirty = false;", file=f) for index in range(len(blocks)): block = blocks[index] + if block["pattern"] != current_pattern: + continue if block["type"] == "match": print(" if (st_{}.{} != nullptr && blacklist_cells.count(st_{}.{})) {{".format(current_pattern, block["cell"], current_pattern, block["cell"]), file=f) print(" rollback = {};".format(index+1), file=f) |