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author | KrystalDelusion <krystinedawn@yosyshq.com> | 2022-08-24 10:28:27 +1200 |
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committer | KrystalDelusion <krystinedawn@yosyshq.com> | 2022-08-24 10:40:57 +1200 |
commit | 9465b2af95a146f514fc1e0b2d31bc3d9a233fb7 (patch) | |
tree | 59001b194c2f573674c37352733427a3ec28a1c1 /passes/pmgen | |
parent | 029c2785e810fda0ccc5abbb6057af760f2fc6f3 (diff) | |
download | yosys-9465b2af95a146f514fc1e0b2d31bc3d9a233fb7.tar.gz yosys-9465b2af95a146f514fc1e0b2d31bc3d9a233fb7.tar.bz2 yosys-9465b2af95a146f514fc1e0b2d31bc3d9a233fb7.zip |
Fitting help messages to 80 character width
Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
Diffstat (limited to 'passes/pmgen')
-rw-r--r-- | passes/pmgen/xilinx_srl.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/passes/pmgen/xilinx_srl.cc b/passes/pmgen/xilinx_srl.cc index a66a06586..eebd30017 100644 --- a/passes/pmgen/xilinx_srl.cc +++ b/passes/pmgen/xilinx_srl.cc @@ -196,9 +196,9 @@ struct XilinxSrlPass : public Pass { log("\n"); log("This pass converts chains of built-in flops (bit-level: $_DFF_[NP]_, $_DFFE_*\n"); log("and word-level: $dff, $dffe) as well as Xilinx flops (FDRE, FDRE_1) into a\n"); - log("$__XILINX_SHREG cell. Chains must be of the same cell type, clock, clock polarity,\n"); - log("enable, and enable polarity (where relevant).\n"); - log("Flops with resets cannot be mapped to Xilinx devices and will not be inferred."); + log("$__XILINX_SHREG cell. Chains must be of the same cell type, clock, clock\n"); + log("polarity, enable, and enable polarity (where relevant).\n"); + log("Flops with resets cannot be mapped to Xilinx devices and will not be inferred.\n"); log("\n"); log(" -minlen N\n"); log(" min length of shift register (default = 3)\n"); |