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authorEddie Hung <eddie@fpgeh.com>2019-09-02 12:13:33 -0700
committerEddie Hung <eddie@fpgeh.com>2019-09-02 12:13:33 -0700
commit7e8f7f4c59c96897159d32771d0c7179c5474281 (patch)
tree1485f73353e8fe1a7825b41a9306b093ca93f774 /passes/pmgen/ice40_dsp.cc
parentf76cb584940fa3217de28febdb103443b8a8cf37 (diff)
parent4aa505d1b254b3fbb66af2d95b396a8f077da9d0 (diff)
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Merge branch 'master' of github.com:YosysHQ/yosys
Diffstat (limited to 'passes/pmgen/ice40_dsp.cc')
-rw-r--r--passes/pmgen/ice40_dsp.cc5
1 files changed, 0 insertions, 5 deletions
diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc
index 39d033a04..16bfe537f 100644
--- a/passes/pmgen/ice40_dsp.cc
+++ b/passes/pmgen/ice40_dsp.cc
@@ -64,11 +64,6 @@ void create_ice40_dsp(ice40_dsp_pm &pm)
bool mul_signed = st.mul->getParam("\\A_SIGNED").as_bool();
- if (mul_signed) {
- log(" inference of signed iCE40 DSP arithmetic is currently not supported.\n");
- return;
- }
-
log(" replacing $mul with SB_MAC16 cell.\n");
Cell *cell = pm.module->addCell(NEW_ID, "\\SB_MAC16");