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authorMarcin Koƛcielnicki <mwk@0x04.net>2019-11-27 00:46:21 +0100
committerMarcin Koƛcielnicki <mwk@0x04.net>2019-11-27 08:01:07 +0100
commitfdcbda195b8806cc3f8fb98e80da55e756c285c4 (patch)
tree512d3cad4d5d3bff84ed3313a22f790fe93d9beb /passes/opt
parent0466c48533ad2831a95c6b63c3a190adb76499e9 (diff)
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opt_share: Fix handling of fine cells.
Fixes #1525.
Diffstat (limited to 'passes/opt')
-rw-r--r--passes/opt/opt_share.cc15
1 files changed, 11 insertions, 4 deletions
diff --git a/passes/opt/opt_share.cc b/passes/opt/opt_share.cc
index 2c456705c..f59f978a6 100644
--- a/passes/opt/opt_share.cc
+++ b/passes/opt/opt_share.cc
@@ -83,7 +83,9 @@ struct ExtSigSpec {
bool operator==(const ExtSigSpec &other) const { return is_signed == other.is_signed && sign == other.sign && sig == other.sig && semantics == other.semantics; }
};
-#define BITWISE_OPS ID($_AND_), ID($_NAND_), ID($_OR_), ID($_NOR_), ID($_XOR_), ID($_XNOR_), ID($_ANDNOT_), ID($_ORNOT_), ID($and), ID($or), ID($xor), ID($xnor)
+#define FINE_BITWISE_OPS ID($_AND_), ID($_NAND_), ID($_OR_), ID($_NOR_), ID($_XOR_), ID($_XNOR_), ID($_ANDNOT_), ID($_ORNOT_)
+
+#define BITWISE_OPS FINE_BITWISE_OPS, ID($and), ID($or), ID($xor), ID($xnor)
#define REDUCTION_OPS ID($reduce_and), ID($reduce_or), ID($reduce_xor), ID($reduce_xnor), ID($reduce_bool), ID($reduce_nand)
@@ -250,14 +252,19 @@ void merge_operators(RTLIL::Module *module, RTLIL::Cell *mux, const std::vector<
shared_op->setPort(ID(CO), alu_co.extract(0, conn_width));
}
- shared_op->setParam(ID(Y_WIDTH), conn_width);
+ bool is_fine = shared_op->type.in(FINE_BITWISE_OPS);
+
+ if (!is_fine)
+ shared_op->setParam(ID(Y_WIDTH), conn_width);
if (decode_port(shared_op, ID::A, &assign_map) == operand) {
shared_op->setPort(ID::B, mux_to_oper);
- shared_op->setParam(ID(B_WIDTH), max_width);
+ if (!is_fine)
+ shared_op->setParam(ID(B_WIDTH), max_width);
} else {
shared_op->setPort(ID::A, mux_to_oper);
- shared_op->setParam(ID(A_WIDTH), max_width);
+ if (!is_fine)
+ shared_op->setParam(ID(A_WIDTH), max_width);
}
}