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author | Johann Glaser <Johann.Glaser@gmx.at> | 2013-03-18 22:06:16 +0100 |
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committer | Johann Glaser <Johann.Glaser@gmx.at> | 2013-03-18 22:06:16 +0100 |
commit | 69674652c5eafab7f96bcdab7618d57630ab0ae7 (patch) | |
tree | 32d6f87e0d778e5ad4f021e9d74be39f4403d53f /passes/opt | |
parent | a4e2c887f12e6bf713ea77c7a2a687b3cd0b984a (diff) | |
download | yosys-69674652c5eafab7f96bcdab7618d57630ab0ae7.tar.gz yosys-69674652c5eafab7f96bcdab7618d57630ab0ae7.tar.bz2 yosys-69674652c5eafab7f96bcdab7618d57630ab0ae7.zip |
added one more suggestion to optimize MUXes in pass "opt_const"
Diffstat (limited to 'passes/opt')
-rw-r--r-- | passes/opt/opt_const.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/opt/opt_const.cc b/passes/opt/opt_const.cc index 909500967..5b87aeaa2 100644 --- a/passes/opt/opt_const.cc +++ b/passes/opt/opt_const.cc @@ -125,6 +125,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module) if (input.match(" 1")) ACTION_DO("\\Y", input.extract(1, 1)); #ifdef MUX_UNDEF_SEL_TO_UNDEF_RESULTS if (input.match("01 ")) ACTION_DO("\\Y", input.extract(0, 1)); + // TODO: "10 " -> replace with "!S" gate // TODO: "0 " -> replace with "B AND S" gate // TODO: " 1 " -> replace with "A OR S" gate // TODO: "1 " -> replace with "B OR !S" gate |