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author | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
commit | f9a307a50b5ce67b67d2b53e8c1334ea23ffd997 (patch) | |
tree | 5a591d0d03c9623abc02aaa3773458193f67ffa1 /passes/opt/opt_rmdff.cc | |
parent | bcd2625a8247ddbcf4a8a819eadcb03846537223 (diff) | |
download | yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.gz yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.bz2 yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.zip |
namespace Yosys
Diffstat (limited to 'passes/opt/opt_rmdff.cc')
-rw-r--r-- | passes/opt/opt_rmdff.cc | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/passes/opt/opt_rmdff.cc b/passes/opt/opt_rmdff.cc index 48f406f65..c7e92ddc1 100644 --- a/passes/opt/opt_rmdff.cc +++ b/passes/opt/opt_rmdff.cc @@ -23,10 +23,13 @@ #include <stdlib.h> #include <stdio.h> -static SigMap assign_map, dff_init_map; -static SigSet<RTLIL::Cell*> mux_drivers; +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN -static bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) +SigMap assign_map, dff_init_map; +SigSet<RTLIL::Cell*> mux_drivers; + +bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) { RTLIL::SigSpec sig_d, sig_q, sig_c, sig_r; RTLIL::Const val_cp, val_rp, val_rv; @@ -215,3 +218,4 @@ struct OptRmdffPass : public Pass { } } OptRmdffPass; +PRIVATE_NAMESPACE_END |