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author | Eddie Hung <eddie@fpgeh.com> | 2019-12-16 21:48:21 -0800 |
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committer | GitHub <noreply@github.com> | 2019-12-16 21:48:21 -0800 |
commit | a73f96594f4688afc85098b485ef7788e79f5c33 (patch) | |
tree | 8b4fdf160bcb8a8db62a309fd409096a721bb3c7 /passes/memory | |
parent | 9935370ada858da56b5d61a3806768af11565a47 (diff) | |
parent | 5d009964266e3b52a01c72ee930601d0ebf3a838 (diff) | |
download | yosys-a73f96594f4688afc85098b485ef7788e79f5c33.tar.gz yosys-a73f96594f4688afc85098b485ef7788e79f5c33.tar.bz2 yosys-a73f96594f4688afc85098b485ef7788e79f5c33.zip |
Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram
xilinx: add LUTRAM rules for RAM32M, RAM64M
Diffstat (limited to 'passes/memory')
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