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| author | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 00:50:25 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 00:50:25 -0800 |
| commit | d960feeeb056a19c722ea9e17c85e2725d76a685 (patch) | |
| tree | eb2daefbd44e4734ae25c06f1002247ccf7eaa65 /passes/hierarchy/submod.cc | |
| parent | 8c813632b6c1557f5123ea0cece2738fad40b89b (diff) | |
| download | yosys-d960feeeb056a19c722ea9e17c85e2725d76a685.tar.gz yosys-d960feeeb056a19c722ea9e17c85e2725d76a685.tar.bz2 yosys-d960feeeb056a19c722ea9e17c85e2725d76a685.zip | |
Stray log_dump
Diffstat (limited to 'passes/hierarchy/submod.cc')
| -rw-r--r-- | passes/hierarchy/submod.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc index 238e1f43f..349483778 100644 --- a/passes/hierarchy/submod.cc +++ b/passes/hierarchy/submod.cc @@ -184,7 +184,6 @@ struct SubmodWorker for (int i = 0; i < GetSize(sig); i++) { if (flags.is_int_driven[i] == State::S0) continue; - log_dump(i, flags.is_int_driven[i]); if (!sig[i].wire) continue; auto it = sig[i].wire->attributes.find(ID(init)); |