diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:08:55 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:27:48 +0200 |
| commit | 7bd2d1064f2eceddc3c93c121c4154a2f594a040 (patch) | |
| tree | 563de1df5e323d0f217a51e29acb56c9e9f1327d /passes/fsm | |
| parent | d86a25f145012ccb6b2048af3aae22f13b97b505 (diff) | |
| download | yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.tar.gz yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.tar.bz2 yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.zip | |
Using log_assert() instead of assert()
Diffstat (limited to 'passes/fsm')
| -rw-r--r-- | passes/fsm/fsm_expand.cc | 6 | ||||
| -rw-r--r-- | passes/fsm/fsm_extract.cc | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/passes/fsm/fsm_expand.cc b/passes/fsm/fsm_expand.cc index f107366d6..2da4794eb 100644 --- a/passes/fsm/fsm_expand.cc +++ b/passes/fsm/fsm_expand.cc @@ -157,9 +157,9 @@ struct FsmExpand A.replace(input_sig, RTLIL::SigSpec(in_val)); B.replace(input_sig, RTLIL::SigSpec(in_val)); S.replace(input_sig, RTLIL::SigSpec(in_val)); - assert(A.is_fully_const()); - assert(B.is_fully_const()); - assert(S.is_fully_const()); + log_assert(A.is_fully_const()); + log_assert(B.is_fully_const()); + log_assert(S.is_fully_const()); truth_tab.push_back(ct.eval(cell, A.as_const(), B.as_const(), S.as_const())); } diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc index 99352b10a..6da468321 100644 --- a/passes/fsm/fsm_extract.cc +++ b/passes/fsm/fsm_extract.cc @@ -109,7 +109,7 @@ static void find_transitions(ConstEval &ce, ConstEval &ce_nostop, FsmData &fsm_d RTLIL::SigSpec undef, constval; if (ce.eval(ctrl_out, undef) && ce.eval(dff_in, undef)) { - assert(ctrl_out.is_fully_const() && dff_in.is_fully_const()); + log_assert(ctrl_out.is_fully_const() && dff_in.is_fully_const()); FsmData::transition_t tr; tr.state_in = state_in; tr.state_out = states[ce.values_map(ce.assign_map(dff_in)).as_const()]; |