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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-24 17:59:44 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-24 17:59:44 +0100 |
| commit | 4bd6f1ee8eb13f94fa7b6d3b87b8f19648ec4d6b (patch) | |
| tree | 259626d3c5e377ef7fe9237961ccec20c182f2a9 /passes/fsm | |
| parent | d9bc024d29dd780e34eb6c9c3e84feab763eeb10 (diff) | |
| download | yosys-4bd6f1ee8eb13f94fa7b6d3b87b8f19648ec4d6b.tar.gz yosys-4bd6f1ee8eb13f94fa7b6d3b87b8f19648ec4d6b.tar.bz2 yosys-4bd6f1ee8eb13f94fa7b6d3b87b8f19648ec4d6b.zip | |
Changed fsm_expand to merge multiplexers more aggressively
Diffstat (limited to 'passes/fsm')
| -rw-r--r-- | passes/fsm/fsm_expand.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/passes/fsm/fsm_expand.cc b/passes/fsm/fsm_expand.cc index df3aec85a..0446c113d 100644 --- a/passes/fsm/fsm_expand.cc +++ b/passes/fsm/fsm_expand.cc @@ -42,6 +42,9 @@ struct FsmExpand bool is_cell_merge_candidate(RTLIL::Cell *cell) { + if (cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux") + return cell->connections.at("\\A").width < 2; + RTLIL::SigSpec new_signals; if (cell->connections.count("\\A") > 0) new_signals.append(assign_map(cell->connections["\\A"])); @@ -137,7 +140,7 @@ struct FsmExpand input_sig.sort_and_unify(); input_sig.remove_const(); - assert(input_sig.width <= 4); + assert(input_sig.width <= 4 || cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux"); std::vector<RTLIL::Const> truth_tab; for (int i = 0; i < (1 << input_sig.width); i++) { |