diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-23 20:45:27 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-23 20:45:27 +0200 |
| commit | 20a7965f61a43b8c367b1042081a57b5a4005b33 (patch) | |
| tree | a3b320501371ec3611a0722895f9e511ea03ffef /passes/fsm | |
| parent | c094c53de83707a5bf1b268640283f1dde235873 (diff) | |
| download | yosys-20a7965f61a43b8c367b1042081a57b5a4005b33.tar.gz yosys-20a7965f61a43b8c367b1042081a57b5a4005b33.tar.bz2 yosys-20a7965f61a43b8c367b1042081a57b5a4005b33.zip | |
Various small fixes (from gcc compiler warnings)
Diffstat (limited to 'passes/fsm')
| -rw-r--r-- | passes/fsm/fsmdata.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/passes/fsm/fsmdata.h b/passes/fsm/fsmdata.h index d0be71c5b..ae9569ed7 100644 --- a/passes/fsm/fsmdata.h +++ b/passes/fsm/fsmdata.h @@ -143,25 +143,25 @@ struct FsmData log(" Input signals:\n"); RTLIL::SigSpec sig_in = cell->connections["\\CTRL_IN"]; for (int i = 0; i < SIZE(sig_in); i++) - log(" %3zd: %s\n", i, log_signal(sig_in[i])); + log(" %3d: %s\n", i, log_signal(sig_in[i])); log("\n"); log(" Output signals:\n"); RTLIL::SigSpec sig_out = cell->connections["\\CTRL_OUT"]; for (int i = 0; i < SIZE(sig_out); i++) - log(" %3zd: %s\n", i, log_signal(sig_out[i])); + log(" %3d: %s\n", i, log_signal(sig_out[i])); log("\n"); log(" State encoding:\n"); for (int i = 0; i < SIZE(state_table); i++) - log(" %3zd: %10s%s\n", i, log_signal(state_table[i], false), + log(" %3d: %10s%s\n", i, log_signal(state_table[i], false), int(i) == reset_state ? " <RESET STATE>" : ""); log("\n"); log(" Transition Table (state_in, ctrl_in, state_out, ctrl_out):\n"); for (int i = 0; i < SIZE(transition_table); i++) { transition_t &tr = transition_table[i]; - log(" %5zd: %5d %s -> %5d %s\n", i, tr.state_in, log_signal(tr.ctrl_in), tr.state_out, log_signal(tr.ctrl_out)); + log(" %5d: %5d %s -> %5d %s\n", i, tr.state_in, log_signal(tr.ctrl_in), tr.state_out, log_signal(tr.ctrl_out)); } log("\n"); |